Optimum Design Associates Blog

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Lean NPI at ODA Part One: Where Are We Now?

For more than twenty years, Optimum Design Associates (Optimum) has offered their customers PCB design and layout services, and also bare-board assembly. Optimum has customers in many application areas in the electronics industry and specialize in very complex PCB designs. To stay at the top of the competitive heap, they employ advanced design techniques and software solutions to ensure the highest quality possible and avoid costly re-spins due to any factor – design errors, data errors, manufacturability problems, signal and power integrity issues, and a host of other potential issues.

Optimum Design Associates designs printed circuit boards following a standardized design flow, ensuring that the requirements of the customers are met, quality levels are high, and the resulting designs are suitable for PCB fabrication, assembly, and test.

PCB DESIGN PROCESS

Although Optimum has several PCB design tools available, depending on customer compatibility and fabricator requirements, they have used Mentor Graphics tools since the business was founded in 1991. Currently, they employ Mentor Graphics Expedition Enterprise and PADS. With Expedition, they also have Xtreme technology that allows multiple designers to work on the same PCB at the same time.

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HDI Layer Stackups for Large Dense PCBs

A few days into a recent project for one of our customers, the lead engineer called me to tell me that the PCB design would have to change…drastically! The design as originally conceived did not seem too difficult—a 20-layer board having active components on one side only, 2.75″ x 4.0″ in size, 284 parts with 2500 pins. That works out to about 228 pins/sq. in. The new requirement was to reduce the board size by 50%. Accomplishing this would prove to be much more difficult, and would require a complete rethinking of the strategies to get the board designed, eventually requiring the use of high-density interconnect (HDI) techniques. What follows is a description of some of the critical design decisions that had to be made along the way toward achieving success in the design effort.

Shrinking the Board

Working with the lead engineer, the first task was to remove all non-essential circuits. After whittling the schematic down to its bare bones and allowing active components to be placed on both sides of the board, we arrived at a final board size of 1.5″ x 1.9″ (2.85″ sq. per side, or 5.7″ sq. total area). This smaller form factor (Fig. 1) resulted in over 900 component pins per square inch of board space, a pin count that is considered very dense, based upon an available but underused, Packaging Map Formula[1]. The resulting pin count ended up well into the HDI region of this chart, so there was no doubt in anyone’s mind that this was going to be an HDI design.

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DDR Memory Layout Design: Rules, Factors, Considerations

Jump rope is a popular childhood activity involving two people swinging the ends of a long rope, with a third person in the middle skipping each time the rope swings under their feet. Now, imagine those same two people swinging not one rope, but two ropes in opposite directions, with the person in the middle working twice as hard. This is “double Dutch” jump rope, and it takes a much higher degree of skill than jumping a single rope because for each cycle of swings, there are two ropes to coordinate rather than just one. And if more than one jumper is in the middle skipping the ropes, the degree of difficulty skyrockets!

Many of today’s printed circuit board (PCB) layouts use some form of Double-Data Rate (DDR) memory, which is like going from a single jump rope to double Dutch. DDR allows two data bit transitions to occur during a single clock cycle, instead of a single data bit transition—as previously in Single Data Rate (SDR) memory—effectively doubling its data throughput. The increased speed of these memory circuits has made the complexity of the PCB layout more demanding with respect to bus timing and signal integrity and, as a result, designers employ a prescribed set of layout techniques in order to meet these demands.

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Switching Power Supply PCB Layout Considerations – Towards a Better Switcher

Have you ever started a switching power supply layout, only to realize that it is impossible to match the datasheet’s suggested layout? Have you wondered which parts of the reference design you should maintain, and which parts you could change? How do layout choices affect the switcher’s performance? In this article I intend to briefly tell the history, explain the major workings, and provide examples of switching power supplies and their design techniques. My hope in doing so is to convey the enjoyment I get from designing these unique circuits.

Switcher History

Some may think that the use of switching power supplies began in the 1970s, but the principles were known as early as the 1930s. Implementations of them include the IBM 704 mainframe computer (1950s), the NASA Telstar satellite (1960s), and Apple’s famous Apple II personal computer (1970s). And pretty much ever since then…well, it was on!

There is no lack of those who want to take credit for the switching power supply’s popularity. However, the reality is that innovations in the semiconductor industry (improvements in switching transistors and the development of new controller ICs) are what should be credited with the explosion of their popularity. A power switch that allowed for very fast switching of large currents was really the key to making switching power supplies practical for the wide array of uses we see them in today. The invention of the Vertical Metal Oxide Semiconductor (VMOS) power switch is what provided this capability. Bipolar transistor power switches work well in high-power switching applications, but these components exhibit slower switching characteristics than the MOSFET, a VMOS power switch. It was important, especially for consumer electronics applications, to increase the switching speed, not just for power efficiency, but also to be above the audible frequency range.

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Clearance and Creepage Rules for PCB Assembly

Electrical spacing rules become significant from a product safety perspective when the normal operating voltage is greater than 30VAC or 60VDC. It may come as a surprise that voltages above these levels are considered hazardous  and that these designs are therefore considered high voltage.

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